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general description the max2116/max2118 family of low-cost direct-conversion tuner ics are designed for use in digital direct broadcast satellite (dbs) television applications, professional vsat systems, and two-way internet through satellite applications. these devices set the standard for integration and performance, significantly reducing the required rf know-how for design imple- mentation. uniquely architected, the max2116/max2118 simplify direct main board and tuner module designs. the max2116/max2118 devices directly convert l- band signals to baseband using a broadband i/q downconverter. the operating frequency range extends from 850mhz to 2175mhz. each ic includes an lna with gain control, i and q downconverting mixers, and baseband lowpass filters gain and cutoff frequency control. together, the rf and baseband variable gain amplifiers provide more than 79db of gain control range. the devices include fully monolithic vcos, as well as a complete frequency synthesizer. additionally, an on- chip crystal oscillator is provided along with a buffered output for driving additional tuners and demodulators. synthesizer programming and device configuration are accomplished with a 2-wire serial interface. for multi- tuner applications, each device can be configured to have one of eight possible 2-wire interface addresses. simplifying the interface to low-voltage cmos demodu- lators, the max2116/max2118 incorporate two 2.85v regulated outputs for pulling up open-drain interface connections, thus preventing noisy 3v rails from cor- rupting the sensitive analog signal of the tuners. the max2116/max2118 devices are the most versatile family of dbs products available. with both single- ended and differential baseband outputs, these devices are compatible with virtually all qpsk/8-psk demodulators. the tuners are available in a very small (6mm x 6mm) 40-pin thin qfn package. applications dvbdss (u.s.) vsat internet through satellite features ? fully integrated vcos ? supports 1mbaud to 45mbaud, 850mhz to2175mhz operation ? 4mhz to 33mhz tunable lp filters ? complete synthesizer with i 2 c interface ? analog rf vga and digital baseband vga ? multiple i 2 c addresses for multituner applications ? single-ended (max2116) and differential(max2118) i/q interface max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 19-2433; rev 4; 7/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp range pin-package max2116 utl 0? to +85? 40 tqfn-ep* max2116utl+ 0? to +85? 40 tqfn-ep* max2118 utl 0? to +85? 40 tqfn-ep* max2118utl+ 0? to +85? 40 tqfn-ep* ________________________________________________________________ maxim integrated products 1 * ep = exposed paddle. + denotes a lead-free/rohs-compliant package. 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 div2/ div4 gc2 dac /n /r pfd cp dc offset correction voltage regulator interface logic and control lpf bw control adc tank tank tank tank tank tank tank tank idc- idc+ vccrf1 rfin- rfin+ n.c.gc1 vreg1 n.c. pad n.c. vcclo vccvco loflt as2 vtune cpout iflt vcccpx cflt xtal+ as1n.c. xtalout cntout xtal- sclvreg2 sda vccdig n.c. vccbbqout+ qout- (max2118 only) as0 qdc-qdc+ vccrf2 iout+ iout- (max2118 only) max2118 pin configuration/ functional diagram downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +5.5v all other pins to gnd .................................-0.3v to (v cc + 0.3v) rfin+ to rfin-, xtl+ to xtl-, idc+ to idc-, qdc+ to qdc- ...................................................................?.0v cntout, xtalout, cpout, vreg1/2, i/qout to gnd short-circuit duration.................................10s continuous current (any pin other than v cc or gnd) .......10ma continuous power dissipation (t a = +85?) 40-pin thin qfn (derate 23.3mw/? above +85?) .... 1.86w operating temperature range ..............................0? to +85? junction temperature .....................................................+150? storage temperature range ............................-65? to +160? soldering temperature (10s) ..........................................+300? dc electrical characteristics(v cc = +4.75v to +5.25v, v gnd = 0v, v gc1 = +0.75v; no ac signal applied, default register settings, t a = 0? to +85?, unless other- wise noted. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) (note 1) parameter conditions min typ max units supply supply voltage 4.75 5.25 v supply current lo locked at 2175mhz 195 265 ma analog gain control input?c1 usable voltage range 0.75 2.6 v input current 0.75v < v gc1 < 2.6v (note 2) -50 +50 ? baseband outputs?iout, qout (max2116) nominal output voltage swing r load = 1k // 10pf (note 3) 0.8 v p-p output clipping voltage 2v p-p dc output voltage 1.2 v baseband outputs?iout? qout?(max2118) bit dl = high 1 nominal output voltage swing r load = 2k // 10pf (differential) (note 3) bit dl = low 0.59 v p-p output clipping voltage 2v p-p common-mode voltage 0.65 0.75 0.85 v dc offset voltage -50 0 +50 mv analog output?vreg1, vreg2 output voltage 2.7 2.85 3.05 v source current each output 3 ma static control inputs?s2, as1, as0 input voltage high 4v input voltage low 0.5 v input current -50 +50 ? synthesizer dc parameters bits cp1 = 0, cp0 = 0 35 50 68 bits cp1 = 0, cp0 = 1 70 100 136 bits cp1 = 1, cp0 = 0 140 200 272 charge pump source/sink current bits cp1 = 1, cp0 = 1 280 400 544 ? downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos _______________________________________________________________________________________ 3 ac electrical characteristics(max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = +25? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) (note 1) parameter conditions min typ max units rf front end rf input frequency range t a = 0? to +85? (note 7) 850 2175 mhz v gc1 = 0.75v (max gain), bits gc2(4) - gc2(0) = 00000 (max gain),for output 800mv p-p -77 -72 input carrier levels necessary to produce800mv p-p at i/q baseband outputs (max2116) v gc1 = 2.6v (min gain), bits gc2(4) - gc2(0) = 11111 (min gain),for output 800mv p-p 31 6 dbm dc electrical characteristics (continued)(v cc = +4.75v to +5.25v, v gnd = 0v, v gc1 = +0.75v; no ac signal applied, default register settings, t a = 0? to +85?, unless other- wise noted. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) (note 1) parameter conditions min typ max units charge pump off-leakage current -10 +10 na charge pump output voltage compliance charge-pump positive-to-negative currentmatching of ?0% 0.4 v cc - 0.6 v i 2 c interface?da, scl clock rate 400 khz input logic level low 1.5 v input logic level high 2.3 v input hysteresis 0.2 v input current -10 +10 ? output logic level low 6ma sink current 0.6 v vtune adc resolution 3b i t s input voltage range (note 4) 0 v cc v 110 to 111 v cc - 0.70 v cc - 0.65 v cc - 0.60 101 to 110 2.8 2.97 3.14 100 to 101 1.91 2.03 2.15 011 to 100 1.29 1.38 1.47 010 to 011 0.87 0.94 1.01 001 to 010 0.60 0.65 0.70 adc reference ladder trip point adc read bits 000 to 001 0.40 0.44 0.48 v downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 4 _______________________________________________________________________________________ parameter conditions min typ max units v gc1 = 0.75v (max gain), bit dl = 1, bits gc2(4) - gc2(0) = 00000 (max gain)for output 800mv p-p -77 -72 input carrier levels necessary to produce1v p-p (differential) at i/q baseband outputs (max2118) v gc1 = 2.6v (min gain), bit dl = 1, bits gc2(4) - gc2(0) = 11111 (min gain),for output 800mv p-p 31 6 dbm v gc1 = 0.75v (max gain), bit dl = 0, bits gc2(4) - gc2(0) = 00000 (max gain),for output 800mv p-p -77 -72 input carrier levels necessary to produce590mv p-p (differential) at i/q baseband outputs (max2118) v gc1 = 2.6v (min gain), bit dl = 0, bits gc2(4) - gc2(0) = 11111 (min gain),for output 800mv p-p 31 6 dbm rf gain control (gc1) range 0.75v < v gc1 < 2.6v 60 69 db baseband gain control (gc2) range bits gc2(4) - gc2(0) = 00000 to 11111 19 24 db iip3 (note 5) 10 dbm iip2 (note 6) 22 dbm nf v gc1 = 0.75v ( m ax g ai n) , b i ts g c 2( 4) - gc 2( 0) = 00000 ( m ax g ai n) 10.5 db minimum rf input return loss 75 i np ut sour ce, 850m h z < f rfi n < 2175m h z1 3 . 5 d b maximum lo leakage at rfin 850mhz < f lo < 2175mhz (note 7) -80 -63 dbm unwanted in 850mhz to 2175mhz band(note 7) 33 50 unwanted = 2250mhz 30 45 lo-generated rfin second harmonicrejection unwanted above 2250mhz 6db/oct db baseband outputs baseband i/q output impedance single ended, real z out 30 baseband highpass -3db point 0.1? capacitors at idc? qdc 850 hz quadrature phase error 125khz baseband test tone 4 degrees quadrature gain error 125khz baseband test tone 1.2 db baseband lowpass bw range baseband -3db cutoff frequency 4 33 mhz fc = 4mhz -5.5 +5.5 % lp filter bw accuracy fc = 33mhz (note 7) -10 +10 % ratio of in-filter-band to out-of-filter-bandnoise f inband = 100hz to 22.5mhz, f outband = 87.5mhz to 112.5mhz 25 db ac electrical characteristics (continued)(max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = +25? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) (note 1) downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos _______________________________________________________________________________________ 5 note 1: parameters are production tested at t a = +25? and +85?; limits called out at 0? are guaranteed by design and charac- terization and are not production tested. note 2: gci gain control is guaranteed over this voltage range. 0.75v corresponds to maximum gain and 2.6v corresponds to minimum gain. note 3: rf front-end specification met at this output level. note 4: the vtune adc transfer curve has been tailored to that of the vco tuning curve. note 5: input ip3 test conditions: vgc1 set to provide 800mv p-p (max2116), 1v p-p differential (max2118, dl = high), 0.59v p-p dif- ferential (max2118 dl = low) baseband output when mixing down a -25dbm tone at 2175mhz to 5mhz baseband, withvgc2 = 00000. two tones at -18dbm each are applied at f lo -100mhz and f lo -195mhz; im3 tone at 5mhz is measured at baseband but is referred to rf input. note 6: input ip2 test conditions: vgc1 set to provide 800 mv p-p (max2116), 1v p-p differential (max2118, dl = high), 0.59v p-p dif- ferential (max2118 dl = low) baseband output when mixing down a -25dbm tone at 2175mhz to 5mhz baseband, withvgc2 = 0.75v. two tones at -25dbm each are applied at f rf = 925mhz and f rf = 1245mhz; im2 tone at f lo - 5mhz is mea- sured at baseband but is referred to rf input. note 7: these parameters are guaranteed by design and characterization, and are not production tested. parameter conditions min typ max units vco performance vco tuning range vco 0 to vco 7 coverage 2250 4500 mhz vco tuning gain worst case, any vco, any tuning voltage 500 mhz/v 10khz offset -75 lo phase noise referred to mixer lo port bit div2 = 1,f lo = 2175mhz 100khz offset -99 dbc/hz synthesizer performance phase detector comparison frequency 0.15 2 mhz reference divide range 2 128 rf divide range 256 32768 level at xtalout 4mhz to 27mhz, driving 10pf 0.75 1 1.5 v p-p pll-referred phase noise floor -143 dbc/hz xtal frequency range 4 27 mhz ac electrical characteristics (continued)(max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = +25? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) (note 1) downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 6 _______________________________________________________________________________________ typical operating characteristics (max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = 0? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) vreg1, vreg2: v out vs. i out max2116 toc09 i out (ma) v out (v) 7 6 5 4 3 2 1 0.5 1.0 1.5 2.0 2.5 3.0 0 08 +85 c +25 c 0 c baseband filter 3db frequency vs. fdac and temperature max2116 toc08 fdac (decimal) baseband filter 3db frequency (mhz) 50 75 5 10 15 20 25 30 35 40 45 50 0 0 100 125 25 +85 c f xtl = 4mhz, m = 2 +25 c 0 c baseband filter 3db frequency vs. fdac max2116 toc07 fdac (decimal) baseband filter 3db frequency (mhz) 120 100 60 80 40 20 5 10 15 20 25 30 35 40 45 50 0 0 f xtl = 4mhz, m = 2 10 1.0 0.1 100 baseband frequency response max2116 toc06 baseband frequency (mhz) baseband output rel to full scale (db) -55 -45 -35 -25 -15 -5 5 -65 f c = 22mhz baseband i/q amplitude matching vs. baseband frequency max2116 toc05 baseband frequency (mhz) baseband i/q amplitude matching (db) 30 25 15 20 10 5 -0.2 -0.4 -0.6 -0.8 0 0.2 0.4 0.6 0.8 1.0 -1.0 03 5 f xtl = 4mhz, m = 2, fdac = 59 (f c = 25mhz) baseband i/q phase error vs. baseband frequency max2116 toc04 baseband frequency (mhz) baseband i/q phase error (degrees) 30 25 15 20 10 5 82 84 86 88 90 92 94 96 98 100 80 03 5 f xtl = 4mhz, m = 2, fdac = 59 (f c = 25mhz) baseband i/q phase error vs. lo frequency max2116 toc03 lo frequency (mhz) baseband i/q phase error (degrees) 2100 1700 900 1300 82 84 86 88 90 92 94 96 98 100 80 500 2500 3rd harmonic vs. fundamental tone baseband output max2116 toc02 fundamental tone baseband output (mv p-p ) 3rd harmonic (dbc) 1300 1200 1100 1000 900 -60 -50 -40 -30 -20 -10 0 -70 800 1400 fundamental tone at 7mhz,3rd harmonic at 21mhz, relative to fundamental supply current vs. supply voltage max2116 toc01 supply voltage (v) supply current (ma) 5.15 5.05 4.85 4.95 170 180 190 200 210 220 230 240160 4.75 5.25 +85 c +25 c 0 c downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos _______________________________________________________________________________________ 7 typical operating characteristics (continued) (max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = 0? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) vco_4: v tune vs. vco frequency max2116 toc18 vco frequency (mhz) v tune (v) 3850 3750 3550 3650 3450 3350 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 3250 from top to bottom: temperature = +85 c, +55 c, +25 c, 0 c v tune vs. vco frequency max2116 toc17 vco frequency (mhz) v tune (v) 5100 4600 3600 4100 3100 2600 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 2100 5600 rf input return loss vs. frequency max2116 toc16 frequency (mhz) rf input return loss (db) 3000 2000 2500 1500 1000 13 14 15 16 17 18 19 20 2112 500 z 0 = 75 iip2 vs. gc2 max2116 toc15 gc2 (decimal) iip2 (dbm) 25 20 15 10 5 21.5 22.0 22.5 23.0 23.5 24.0 24.5 25.0 25.5 26.021.0 03 0 gc1 = 0.75v, f lo = 2175mhz iip3 vs. lo frequency max2116 toc14 lo frequency (mhz) iip3 (dbm) 2125 1925 1525 1725 1325 1125 1 3 5 7 9 11 13 15 17 -1 925 2325 gc1 adjusted for full-scale basebandoutput with p rfin = -25dbm. from top to bottom: gc2 = 0, 5, 10, 15, 20, 25, 30 noise figure vs. gc2 max2116 toc13 gc2 noise figure (db) 30 25 20 15 10 5 10.5 11.0 11.5 12.0 12.5 13.0 13.510.0 03 5 gc1 = 0.75v, f lo = 1500mhz noise figure vs. lo frequency max2116 toc12 lo frequency (mhz) noise figure (db) 2100 1900 1700 1500 1300 1100 9.5 10.0 10.5 11.0 11.5 12.0 9.0 900 2300 gc1 = 0.75v, gc2 = 0 +25 c 0 c +85 c baseband gain vs. gc2 max2116 toc11 gc2 (decimal) baseband gain (db) 30 25 20 15 10 5 -20 -15 -10 -5 0 -25 03 5 gc1 = 1.86v, rfin = -40dbm,f lo = 1550mhz, f cbb = 20mhz, f bb = 1mhz rf input power vs. gc1 (baseband output = 800mv p-p ) max2116 toc10 gc1 (v) rf input power (dbm) 2.50 1.00 1.25 1.50 2.00 1.75 2.25 -70 -60 -50 -40 -30 -20 -10 0 10 -80 0.75 from top to bottom:gc2 = 30, 25, 20, 15, 10, 5, 0 downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 8 _______________________________________________________________________________________ 1925 1675 1425 1175 925 2175 lo-to-rfin leakage vs. frequency max2116 toc23 frequency (mhz) lo-to-rfin leakage (dbm) -110 -100 -90 -80 -70 -60 -120 -95 -90 -85 -80 -75 -70 -65 -60 -55 -50 -100 phase noise vs. offset max2116 toc22 offset frequency (khz) phase noise (dbc/hz) 10 1 100 f lo = 2175mhz f comp = 1mhz phase noise at 10khz offset vs. frequency max2116 toc21 frequency (mhz) phase noise (dbc/hz) 1925 1675 1425 1175 -88 -86 -84 -82 -80 -78 -76 -74 -72 -70-90 925 2175 f comp = 1mhz vco (4-7) kv vs. v tune max2116 toc20 v tune (v) kv (mhz/v) 3.4 2.8 2.2 1.6 1.0 75 175 275 325 375 425 525 25 0.4 4.0 from top to bottom: vco7, vco6, vco5, vco4 475 125 225 vco (0-3) kv vs. v tune max2116 toc19 v tune (v) kv (mhz/v) 3.4 2.8 2.2 1.6 1.0 50 100 150 200 250 300 350 0 0.4 4.0 from top to bottom: vco3, vco2, vco1, vco0 typical operating characteristics (continued) (max2116/max2118 ev kits, v cc = +4.75v to +5.25v, gc1 and gc2 set for maximum gain, v gnd = 0, v iout = v qout = 800mv p-p (max2116), loaded with 1k v iout = v qout = 590mv p-p differential (dl = 0, max2118), v iout = v qout = 1v p-p differential (dl = 1, max2118), loaded with differential 2k . baseband lpf bw = 33mhz, f rfin = 2175mhz. for default register values, see the serial interface and control registers section. t a = 0? to +85?. typical values are at v cc = +5v, t a = +25?, unless otherwise noted.) downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos _______________________________________________________________________________________ 9 pin name function 1, 2 idc-, idc+ i-channel baseband dc offset correction. connect a 0.1? ceramic chip capacitor from idc- to idc+. 3 vccrf1 dc power supply for lna and first-stage rf vga. connect to a 5v ?% low-noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. 4 rfin- 75 rf-inverting input. working in conjunction with rfin+ for differential input. terminate with 22pf capacitor in series with a 75 resistor to gnd for single-ended input. 5 rfin+ 75 rf noninverting input. working in conjunction with rfin- for differential input. connect to source through a 22pf series capacitor. 6, 9, 11, 25, 31 n.c. no connection. pin should be connected directly to gnd. 7 gc1 gain control input for rf front end. high-impedance analog input with an operating range of0.75v to 2.6v. vgc1 = 0.75v corresponds to maximum gain. 8, 28 vreg1, vreg2 2.85v linear regulator. used for terminating open-drain interfaces from demodulator. eachregulator can source 3ma. 10 pad ground. direct connection to exposed pad. can be used to check exposed pad continuity toground. 12 vcclo dc power supply for lo circuits. connect to a 5v ?% low-noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. 13 vccvco dc power supply for vco circuits. connect to a 5v ?% low-noise supply. see the applications information section for more details. 14 loflt lo internal regulator bypass. bypass with a 0.22? ceramic chip capacitor to gnd. 15, 26, 32 as2, as1, as0 i 2 c address select control. see table 1 and table 2. these pins are internally pullup to v cc . for logic high, leave these pins open. 16 vtune high impedance vco tune input 17 cpout charge-pump output 18 iflt test pin. for normal operation, connect iflt to ground. 19 vcccpx dc power supply for charge pump and xtal oscillator circuits. connect to a 5v ?% low- noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. 20 cflt bypass for internal crystal oscillator bias. bypass with a 0.22uf ceramic chip capacitor tognd. 21, 22 xtl+, xtal- crystal oscillator interface. see typical operating circuit . 23 cntout test pin. must be left open. 24 xtalout crystal oscillator buffer output. requires a 10nf dc-blocking capacitor. 27, 29 sda, scl i 2 c data and clock interface. see the applications information section for details. 30 vccdig dc power supply for digital circuits. connect to a 5v ?% low-noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. n.c. (max2116) no connection. pin should be connected directly to gnd. 33 qout- (max2118) inverting baseband quadrature output pin description downloaded from: http:///
max2116/max2118 detailed description the max2116/max2118 downconvert rf signals in the850mhz to 2175mhz range directly to baseband i/q sig- nals. they are targeted for digital dbs tuner applications. however, the max2116/max2118 are applicable to any system requiring a broadband i/q downconversion. internally, the max2116/max2118 consist of a broad- band front-end lna and variable gain stage, quadrature downconverter, monolithic broadband vcos, complete frequency synthesizer, crystal reference oscillator and buffer amplifier, programmable baseband lowpass fil- ters, high-linearity i and q baseband amplifiers, and off- set correction amplifiers. the max2116/max2118 feature a front-end vga dynam- ic range in excess of 60db. additionally, the baseband vga provides in excess of 19db of additional gain con- trol. the vswr at rfin is unaffected by the vga setting. the max2116/max2118 include completely monolithic vcos to cover the entire 850mhz to 2175mhz frequen- cy range. the complete frequency range is covered within a 5v tuning range, thus eliminating the need for costly 30v supplies and varactor diodes. the vco architecture also eliminates problems associated with frequency pulling with high receive input signal levels. applications information vccvco (pin 13) bypass adequate filtering of the vcc connection to the vccvco supply pin is critical to achieve low phase noise performance. see the typical operating circuit . baseband lpfs the max2116/max2118 include programmable on-chip 7th-order butterworth lowpass filters. the filter bandwidth is adjusted by setting two internal registers (m, fdac). the m counter should be set such that the crystal frequency divided by m is between 1mhz and 2.5mhz. the fdac register is then used to fine tune the bandwidth. the -3db cutoff frequency is determined by the following equation: f(3db) = f xtal / m ? (4 + 0.145 ? fdac) where m and fdac are decimals. the filter can be adjusted from approximately 4mhz to 33mhz. total device supply current is dependent on the filter bw setting, with increasing current commensu- rate with increasing 3db bw. i/q output voltage level the max2116 i/q outputs are single-ended and opti-mized for a nominal output voltage drive of 800mv p-p . output clipping levels are typically 2v p-p . the max2118 i/q outputs are differential, with two pos-sible nominal output voltage levels. the nominal output voltage swing is set through the dl bit byte 04 (see register table description). with dl = low, the nominal output voltage swing is 590mv p-p differential; dl = high complete dbs direct-conversion tuner ics with monolithic vcos 10 ______________________________________________________________________________________ pin name function 34 qout+ noninverting baseband quadrature output 35 vccbb dc power supply for baseband circuits. connect to a 5v ?% low-noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. n.c. (max2116) no connection. pin should be connected directly to gnd. 36 iout - ( m ax2118) inve rting baseband in-phase output 37 iout/iout+ noninverting baseband in-phase output 38 vccrf2 dc power supply for rf circuits and second-stage rf vga circuits. connect to a 5v ?% low- noise supply. bypass with a 1nf capacitor directly to gnd. do not share vias. 39, 40 qdc+, qdc- q-channel baseband dc offset correction. connect a 0.1? ceramic chip capacitor fromqdc- to qdc+. exposed pad ground pin description (continued) downloaded from: http:///
boosts the baseband output gain by 4.5db, thus allow-ing the output voltage swing of 1v p-p . output clipping levels are typically 2v p-p differential. dc offset compensation idc and qdc the baseband highpass response is set through a capac-itor connected between idc+ and idc- for the i channel and qdc+ and qdc- for the q channel. the 3db high- pass bandwidth is determined by the following equation: f3db (highpass in hz) = 1 / (11.75k ? c), c in farads to reduce the potential for baseband spurious pickup,keep the connection between the dc compensation capacitors and the idc and qdc pins as short as possible by placing the capacitors as close to the device as manufacturing allows. vreg1 and vreg2 the max2116/max2118 include two 2.85v voltage reg-ulator outputs, with a maximum source current rating of 3ma each. these outputs ease the interface to low-volt- age demodulators by providing a clean pullup termina- tion for open-drain/collector outputs. vreg1 is located by the gc1 input control, with vreg2 conveniently located between the 2-wire interface control pins. vco selection the max2116/max2118 include eight fully monolithicvcos to cover the entire 850mhz to 2175mhz range. maxim has a detailed application note that describes the operation of the vco system and proper selection of the desired vco. this application note is available by request from maxim. crystal output buffer (xtalout) the on-chip crystal oscillator circuit has been designedfor operation from 4mhz to 27mhz. the crystal output buffer amplifier is designed to nominally deliver between 0.75v p-p and 1.5v p-p . however, it might be necessary to add a resistor between the xtalout pinand ground to increase the signal swing when using higher frequency crystals (>20mhz). recommendedvalues are between 2k and 5k . serial interface and control registers programming bits the max2116/max2118 conform to the philips i 2 c stan- dard, 400kbps (fast mode), and operate as a slave.the max2116/max2118 have eight read and write addresses, which are determined by the logic state of the three address-select pins (as2, as1, and as0). in all cases, the msb is transmitted and read first (see tables 1, 2, 3). programming bit definition byte 00 (default = 03) bit div2 controls the vco frequency divider. high level= divide-by-2 enabled; low level = divide-by-4 enabled. default is div2 = 0 (divide-by-4 enabled). bits n(14)?(8) are the 7 upper bits of the 15-bit pro- grammable n divider, with the default value of n = 950. the overall vco divide ratio is: 2 14 ? n(14) + 2 13 ? n(13) ?+2 5 ? n(5) + 2 4 ? n(4) + 2 3 ? n(3) ?+ 2 0 ? n(0) byte 01 (default = b6) bits n(7)?(0) are the 8 lower bits of the 15-bit pro-grammable n divider. max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos ______________________________________________________________________________________ 11 table 1. max2116/max2118 write address byte as2 as1 as0 msb address byte lsb low low low 1 1 0 0 0 0 0 0 low low high 1 1 0 0 0 0 1 0 low high low 1 1 0 0 0 1 0 0 low high high 1 1 0 0 0 1 1 0 high low low 1 1 0 0 1 0 0 0 high low high 1 1 0 0 1 0 1 0 high high low 1 1 0 0 1 1 0 0 high high high 1 1 0 0 1 1 1 0 downloaded from: http:///
max2116/max2118 byte 02 (default = 3d) bits r2, r1, and r0 are the reference divider bits.the overall reference divide ratio r = 2 x 2 (4 x r2 + 2 x r1 + r0) , with the default value of r = 4 (r2 = 0, r1 = 0, r0 = 1).bits cp1, cp0 control the charge pump current, with the default value of ?00? (table 4). bits osc2, osc1, and osc0 control which of the eight on-chip vcos is activated. default is vco 5 (101) (table 5). byte 03 (default = 7f) bit x(0) is unused; default = 0.bits f(6)?(0) set the value of fdac for the baseband lowpass filter -3db cutoff frequency. (see the baseband lpfs section). fdac = 2 6 ? f(6) + ... +2 0 f(0). (default fdac = 127.) byte 04 (default = 02) bit adl is the vco adc latch-enable bit. adl = 1latches adc value (adl = 0, default). bit ade enables vco tune voltage dac read. ade = 1 enables adc read (ade = 0, default). bit dl sets the differential output drive level for the max2118 (default, dl = 0) (table 6). this bit is unused for the max2116. bits m(4)?(0) set the value of m counter of lowpass fil- ter bw control. m = 2 4 ? m(4) + 2 3 ? m(3) + ... +2 0 m(0). ( default m = 2.) complete dbs direct-conversion tuner ics with monolithic vcos 12 ______________________________________________________________________________________ table 3. max2116/max2118 control register bytes write to mode resetvalue addr-h msb control byte lsb address c0c2 c4 c6 c8 ca cc ce 11 1 1 1 1 1 1 11 1 1 1 1 1 1 00 0 0 0 0 0 0 00 0 0 0 0 0 0 00 0 0 1 1 1 1 00 1 1 0 0 1 1 01 0 1 0 1 0 1 00 0 0 0 0 0 0 n high 03 00 div2 n14 n13 n12 n11 n10 n9 n8 n low b6 01 n7 n6 n5 n4 n3 n2 n1 n0 r and cp and vco 3d 02 r2 r1 r0 cp1 cp0 osc2 osc1 osc0 i/q filter dac 7f 03 x0 f6 f5 f4 f3 f2 f1 f0 lpf divider dac 02 04 adl ade dl m4 m3 m2 m1 m0 gc2 and diag 1f 05 d2 d1 d0 g4 g3 g2 g1 g0 table 2. max2116/max2118 read address byte as2 as1 as0 msb address byte lsb low low low 1 1 0 0 0 0 0 1 low low high 1 1 0 0 0 0 1 1 low high low 1 1 0 0 0 1 0 1 low high high 1 1 0 0 0 1 1 1 high low low 1 1 0 0 1 0 0 1 high low high 1 1 0 0 1 0 1 1 high high low 1 1 0 0 1 1 0 1 high high high 1 1 0 0 1 1 1 1 downloaded from: http:///
byte 05 (default = 1f) bits d(2), d(1), and d(0) control diagnostic features(table 7). bits g(4)?(0) controls the gain of the baseband vga. the bb gain is minimum at 11111 and the bb gain is maximum at 00000. default is minimum gain setting of 11111 (table 8). i 2 c read status bits bit pwr high indicates power has been cycled, and themax2116/max2118 registers have been reset to default values. a stop condition while in read mode resets this bit. bits adc(2), adc(1), and adc(0) represent a 3-bit adc conversion of the vco tune voltage used for vco and charge pump current selection and calibration. bits f(6)?(0) are a 7-bit representation of the lpf dac current. serial interface functional description register map this is the standard i 2 c protocol. the write/read/ address bytes are dependent on the states of pinsas0/as1/as2. write operation the first byte is the device address plus the directionbit (r/ w = 0). the second byte contains the internal address com-mand of the first address to be accessed. the third byte is written to the internal register directed by the command address byte. the following bytes (if any) are written into successive internal registers. the transfer lasts until stop conditions are encountered. the max2116 acknowledges every byte transfer. read operation when an address is sent, the max2116 sends backfirst the status byte and then the i/q dac byte. example: write registers 0 to 3 with 0e, d8, 26 (table 9). example: read from status registers. sending an ack terminates slave transmit mode (table 10). max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos ______________________________________________________________________________________ 13 cp1 cp0 charge pump current (?) 00 50 01 100 10 200 11 400 (default) table 4. charge pump current setting(byte 02) osc2 osc1 osc0 vco band 0000 0011 0102 0113 1004 1 0 1 5 (default) 1106 1117 table 5. on-chip vco selection (byte 02) dl iout? qout?output voltage level (differential) (v p-p ) 00 . 5 9 11 . 0 table 6. max2118 output drive levelselection (byte 04) downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos 14 ______________________________________________________________________________________ read from mode reset val addr-h msb lsb address c1c3 c5 c7 c9 cb cd cf 11 1 1 1 1 1 1 11 1 1 1 1 1 1 00 0 0 0 0 0 0 00 0 0 0 0 0 0 00 0 0 1 1 1 1 00 1 1 0 0 1 1 01 0 1 0 1 0 1 11 1 1 1 1 1 1 status info 00 0 pwr 0 adc2 adc1 adc0 0 0 i/q filter dac 00 0 f6 f5 f4 f3 f2 f1 f0 table 8. baseband gain setting (byte 5) table 9. example 1 start device address write ack register address 00 ack data 0e ack data d8 ack data 26 ack stop start device address read ack status register 00 ack dac d8 ack/ nack stop table 10. example 2 d2 d1 d0 diagnostic functions 0 0 0 normal operation 0 0 1 force charge pump source current 0 1 0 force charge pump sink current 0 1 1 force charge pump high-z state 1 0 0 unused 1 0 1 n divider output frequency at cntout pin and filter dac output at ifilt pin 1 1 0 r divider output frequency at cntout pin and gc2 dac output at ifilt pin 1 1 1 m divider output frequency at cntout pin table 7.diagnostic functions (byte 05) chip information transistor count: 10,935 package information for the latest package outline information and land patterns, goto www.maxim-ic.com/packages. package type package code document no. 40 tqfn t4066-3 21-0141 downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos ______________________________________________________________________________________ 15 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 11 12 13 14 15 16 17 18 19 20 gc1 xtalout sclsda qout+ qout- iout+ iout- 40 39 38 37 36 35 34 33 32 31 div2/ div4 gc2 dac /n /r pfd cp dc offset correction voltage regulator interface logic and control lpf bw control loop filter (max2118) (max2118) rfin adc v cc v cc v cc v cc v cc v cc v cc v cc v cc v cc tank tank tank tank tank tank tank tank max2118 typical operating circuit downloaded from: http:///
max2116/max2118 complete dbs direct-conversion tuner ics with monolithic vcos maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 4 7/08 widened rf input frequency range for new application 1, 3, 4, 5, 10, 11 downloaded from: http:///

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